SLLSG00 April 2024 TCAN2451-Q1
ADVANCE INFORMATION
- 1
- 1Features
- 2Applications
- 3Description
- 4Pin Configuration and Functions
- 5Device and Documentation Support
- 6Revision History
- 7Mechanical, Packaging, and Orderable Information
4 Pin Configuration and Functions
Figure 4-1 RHB Package, 32 Pin (VQFN)(Top View)
Table 4-1 Pin Functions
| NAME | PIN NO. | TYPE(1) | DESCRIPTION |
|---|---|---|---|
| RHB | |||
| WAKE2/ID2 | 1 | I | High voltage (HV) capable. Local wake input terminal. Configurable as an ID pin |
| WAKE1/ID1 | 2 | I | HV capable. Local wake input terminal. Configurable as an ID pin |
| LIMP/LSS | 3 | O | HV capable. Limp home output (Active low; open-drain output) |
| HSS4 | 4 | O | HV. High side switch 4 output |
| HSS3 | 5 | O | HV. High side switch 3 output |
| HSS2 | 6 | O | HV. High side switch 2 output |
| HSS1 | 7 | O | HV. High side switch 1 output |
| VHSS | 8 | P | HV. Separate input supply for the high side switches. Typically connected to the battery but can also be supplied independently. |
| VSUPB | 9 | P | HV. Input supply from the battery for the buck regulator. VSUPB and VSUP must be to the same battery supply, but separated by the EMI filter as shown in the application schematic to reduce the conducted EMI on the VSUP pin. |
| BUCKSW | 10 | P | HV. Buck regulator switching node. Connect to power inductor. |
GND | 11 | G | Ground |
| BOOT | 12 | P | HV. Bootstrap supply voltage for internal high-side driver. Connect a high-quality 100nF capacitor from this pin to the BUCKSW pin. |
| VCC1 | 13 | P | Buck regulator output 3.3V or 5V. Connect a high-quality capacitor to GND. |
| nRST | 14 | I/O | Low-voltage (LV) digital. VCC1 under-voltage monitor output pin (active low) and device reset input |
| nINT | 15 | O | LV digital. Interrupt output (active low) |
| SW | 16 | I | LV digital . Programming mode input pin (SPI configurable active high or active low). Internal pull-up (active low configuration) or pull-down (active high configuration) of 60 kΩ |
| SCK | 17 | I | LV digital. SPI clock input |
| SDI | 18 | I | LV digital. SPI data input. Internal pull-up of 60kΩ |
| SDO | 19 | O | LV digital. SPI data output. |
| nCS | 20 | I | LV digital. Chip select input (active low). Internal pull-up of 60kΩ |
| VSEL | 21 | I | LV digital. VCC1 output voltage selector pin.
Internal pull-up of 30kΩ |
| GFO | 22 | O | LV digital. General function output pin (SPI configurable); Push-pull |
| CTXD | 23 | I | LV digital. CAN transmit data input (low for dominant and high for recessive bus states); Internal pull-up of 60kΩ. |
| CRXD | 24 | O | LV digital. CAN receive data output (low for dominant and high for recessive bus states), tri-state |
| VSUP | 25 | P | HV. Input supply pin, typically connected to battery. |
| VCC2 | 26 | P | 5V LDO output. Short-to-battery protected. |
| VCAN | 27 | P | 5V power supply input for the CAN FD transceiver |
| CANH | 28 | I/O | HV capable. High level CAN bus I/O line |
| CANL | 29 | I/O | HV capable . Low level CAN bus I/O line |
| GND | 30 | G | Ground connection: Must be soldered to ground |
| WAKE4/ID4 | 31 | I | HV capable. Local wake input terminal. Configurable as ID pin |
| WAKE3/ID3 | 32 | I | HV. Local wake input terminal. Configurable as an ID pin |
| NC | - | NC | Not connected internally. |
| GND | Thermal Pad | G | Ground connection: Must be soldered to ground |
(1) I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power, NC = No Connect